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Electromigration-aware and IR-Drop avoidance routing in analog multiport terminal structures., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing., , , , and . DATE, page 1201-1206. IEEE, (2017)Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization., , , , , and . SMACD, page 285-288. IEEE, (2019)On the Exploration of Promising Analog IC Designs via Artificial Neural Networks., , , , , , and . SMACD, page 133-136. IEEE, (2018)Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1599-1603 (2018)Electromigration-aware analog Router with multilayer multiport terminal structures., , , and . Integr., 47 (4): 532-547 (2014)A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications., , , , , , and . ISCAS, page 1-5. IEEE, (2022)Stochastic-based placement template generator for analog IC layout-aware synthesis., , , and . Integr., (2017)Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications., , , , , , and . Microelectron. J., (2020)Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop., , , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (6): 989-1002 (2019)