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Disambiguation of "Fujimoto, Yoshihisa"

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A low-power switched-capacitor variable gain amplifier.

, , , , , and . IEEE J. Solid State Circuits, 39 (7): 1213-1216 (2004)

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Naho Fujimoto

 

Other publications of authors with the same name

A low-power switched-capacitor variable gain amplifier., , , , , and . IEEE J. Solid State Circuits, 39 (7): 1213-1216 (2004)A 18 mW CT ΔΣ modulator with 25 MHz bandwidth for next generation wireless applications., , , , , , and . CICC, page 73-76. IEEE, (2007)A delta-sigma modulator for a 1-bit digital switching amplifier., , and . IEEE J. Solid State Circuits, 40 (9): 1865-1871 (2005)Herman Rings of Blaschke Products of Degree 3.. Int. J. Bifurc. Chaos, 19 (1): 445-451 (2009)A 2-V 3.7-mW delay locked-loop using recycling integrator correlators for a 5-Mcps DS-CDMA demodulator., , , , and . CICC, page 35-38. IEEE, (2000)A delta-sigma modulator for 1-bit digital switching amplifier audio power amplifier., , , and . CICC, page 177-180. IEEE, (2004)A 100 MS/s 4 MHz Bandwidth 70 dB SNR ΔΣ ADC in 90 nm CMOS., , , and . IEEE J. Solid State Circuits, 44 (6): 1697-1708 (2009)CDMA functional blocks using recycling integrator correlators-matched filters and delay-locked loops., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 36 (3): 385-397 (2001)A highly linear CMOS buffer circuit with an adjustable output impedance., , and . CICC, page 685-688. IEEE, (2003)A 100-MS/s 4-MHz Bandwidth 77.3-dB SNDR ΔΣ ADC with a Triple Sampling Technique., , , and . CICC, page 53-56. IEEE, (2006)