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Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator.

, , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (1): 86-101 (2018)

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Enabling energy efficient Hybrid Memory Cube systems with erasure codes., , , and . ISLPED, page 67-72. IEEE, (2015)Memristive Accelerators for Dense and Sparse Linear Algebra: From Machine Learning to High-Performance Scientific Computing.. IEEE Micro, 39 (1): 58-61 (2019)TCAM-SSD: A Framework for Search-Based Computing in Solid-State Drives., , , , , , and . CoRR, (2024)AC-DIMM: associative computing with STT-MRAM., , , , and . ISCA, page 189-200. ACM, (2013)Enabling Scientific Computing on Memristive Accelerators., , , , and . ISCA, page 367-382. IEEE Computer Society, (2018)Self-Optimizing Memory Controllers: A Reinforcement Learning Approach., , , and . ISCA, page 39-50. IEEE Computer Society, (2008)Reducing data movement energy via online data clustering and encoding., and . MICRO, page 32:1-32:13. IEEE Computer Society, (2016)Energy-Efficient Nonvolatile Flip-Flop With Subnanosecond Data Backup Time for Fine-Grain Power Gating., , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (12): 1154-1158 (2015)An Analog Preconditioner for Solving Linear Systems., , , , , , , , and . HPCA, page 761-774. IEEE, (2021)More is less: improving the energy efficiency of data movement via opportunistic use of sparse codes., and . MICRO, page 242-254. ACM, (2015)