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BAG2: A process-portable framework for generator-based AMS circuit design., , , , , , and . CICC, page 1-8. IEEE, (2018)A 4.78 mm 2 Fully-Integrated Neuromodulation SoC Combining 64 Acquisition Channels With Digital Compression and Simultaneous Dual Stimulation., , , , , , , and . IEEE J. Solid State Circuits, 50 (4): 1038-1047 (2015)A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET., , , , , , , , , and 21 other author(s). A-SSCC, page 285-288. IEEE, (2018)BAG: A Process-Portable Framework for Generator-based AMS Circuit Design., , , and . CICC, page 1-20. IEEE, (2019)An Automated SerDes Frontend Generator Verified with a 16NM Instance Achieving 15 GB/S at 1.96 PJ/Bit., , , and . VLSI Circuits, page 153-154. IEEE, (2018)A 60-GHz Transceiver and Baseband With Polarization MIMO in 28-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 53 (12): 3613-3627 (2018)A 2-tap switched capacitor FFE transmitter achieving 1-20 Gb/s at 0.72-0.62 pJ/bit., , , and . ESSCIRC, page 273-276. IEEE, (2019)A fully-integrated 10.5µW miniaturized (0.125mm2) wireless neural sensor., , , , and . VLSIC, page 72-73. IEEE, (2012)A Fully-Integrated, Miniaturized (0.125 mm2) 10.5 µW Wireless Neural Sensor., , , , , , and . IEEE J. Solid State Circuits, 48 (4): 960-970 (2013)A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2019)