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Disambiguation of "Murray, Kevin E."

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HETRIS: Adaptive floorplanning for heterogeneous FPGAs.

, and . FPT, page 88-95. IEEE, (2015)

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Alexander Ali Kevin

Bernd Murray

Konstanze Murray

Merit Murray

Kathleen Murray

 

Other publications of authors with the same name

Respect the Difference: Reinforcement Learning for Heterogeneous FPGA Placement., , , , and . ICFPT, page 152-160. IEEE, (2023)Quantifying error: Extending static timing analysis with probabilistic transitions., , , and . DATE, page 1486-1491. IEEE, (2017)Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (4): 719-732 (2019)VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling., , , , , , , , , and 5 other author(s). ACM Trans. Reconfigurable Technol. Syst., 13 (2): 9:1-9:55 (2020)Timing-Driven Titan: Enabling Large Benchmarks and Exploring the Gap between Academic and Commercial CAD., , , , and . ACM Trans. Reconfigurable Technol. Syst., 8 (2): 10:1-10:18 (2015)Learn to Place: FPGA Placement Using Reinforcement Learning and Directed Moves., , and . FPT, page 85-93. IEEE, (2020)Tatum: Parallel Timing Analysis for Faster Design Cycles and Improved Optimization., and . FPT, page 110-117. IEEE, (2018)RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (8): 2532-2545 (2022)From Quartus to VPR: Converting HDL to BLIF with the Titan flow., , , , and . FPL, page 1. IEEE, (2013)SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs., , , , , and . IEEE Micro, 40 (4): 49-57 (2020)