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Fault Simulation Method for Crosstalk Faults in Clock-Delayed Domino CMOS Circuits.

, , , , and . DELTA, page 92-98. IEEE Computer Society, (2002)

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High-resolution DPWM generator for digitally controlled DC-DC converters., , , , , , , , and . APCCAS, page 914-917. IEEE, (2008)Built-in Self-Test for State Faults Induced by Crosstalk in Sequential Circuits., , and . Asian Test Symposium, page 469. IEEE Computer Society, (2001)Exponential-Time Quantum Algorithms for Graph Coloring Problems., and . Algorithmica, 84 (12): 3603-3621 (2022)A graph-theoretical approach to region detection., , and . COMPSAC, page 751-756. IEEE, (1979)A Time-to-Digital Converter with small circuitry., , , , , and . ASP-DAC, page 109-110. IEEE, (2009)Image retrieval considering people co-occurrence relations using relevance feedback., , and . Multimedia on Mobile Devices / Multimedia Content Access: Algorithms and Systems, volume 7881 of SPIE Proceedings, page 788117. SPIE, (2011)Built-in Self-Test for crosstalk faults in a digital VLSI., , and . Syst. Comput. Jpn., 33 (13): 35-47 (2002)Exponential-time quantum algorithms for graph coloring problems., and . CoRR, (2019)Crosstalk Fault Reduction and Simulation for Clock-Delayed Domino Circuits., , and . Asian Test Symposium, page 176-181. IEEE Computer Society, (2002)Fault Simulation Method for Crosstalk Faults in Clock-Delayed Domino CMOS Circuits., , , , and . DELTA, page 92-98. IEEE Computer Society, (2002)