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bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.

H. Miyaoka, F. Terasawa, M. Kudo, H. Kano, A. Matsuda, N. Shirai, S. Kawai, T. Shibasaki, T. Danjo, Y. Ogata, Y. Sakai, H. Yamaguchi, T. Mori, Y. Koyanagi, H. Tamura, Y. Ide, K. Terashima, H. Higashi, T. Higuchi, and N. Naka. VLSI Circuits, page 1-2. IEEE, (2016)

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Hajime Sakai

Winfried Sakai

Noriyuki Sakai

Asato Sakai

Arito Rüdiger Sakai

Other publications of authors with the same name

Neural-network assistance to calculate precise eigenvalue for fitness evaluation of real product design.Y. Tsunoda, T. Notsu, Y. Sakai, N. Hamada, T. Mori, T. Ishihara, and A. Inoue. GECCO (Companion), page 405-406. ACM, (2019)Self-Supervised Learning with Atom Replacement for Catalyst Energy Prediction by Graph Neural Networks.Y. Sakai, T. Dang, S. Fukuta, K. Shirahata, A. Ishikawa, A. Inoue, H. Kawaguchi, Á. Höskuldsson, and E. Skúlason. INNS DLIA@IJCNN, volume 222 of Procedia Computer Science, page 458-467. Elsevier, (2023)A Mixed-Precision Quantization Method without Accuracy Degradation Using Semilayers.K. Matsumoto, T. Matsuda, A. Inoue, H. Kawaguchi, and Y. Sakai. ACML, volume 222 of Proceedings of Machine Learning Research, page 882-894. PMLR, (2023)3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE.K. Oishi, E. Yoshida, Y. Sakai, H. Takauchi, Y. Kawano, N. Shirai, H. Kano, M. Kudo, T. Murakami, T. Tamura and 5 other author(s). ISSCC, page 60-61. IEEE, (2014)Semilayer-Wise Partial Quantization Without Accuracy Degradation or Back Propagation.T. Matsuda, K. Matsumoto, A. Inoue, H. Kawaguchi, and Y. Sakai. ICANN (9), volume 14262 of Lecture Notes in Computer Science, page 283-295. Springer, (2023)3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS.T. Shibasaki, T. Danjo, Y. Ogata, Y. Sakai, H. Miyaoka, F. Terasawa, M. Kudo, H. Kano, A. Matsuda, S. Kawai and 7 other author(s). ISSCC, page 64-65. IEEE, (2016)A High-Speed Neural Architecture Search Considering the Number of Weights.F. Yamada, S. Tsuji, H. Kawaguchi, A. Inoue, and Y. Sakai. KI, volume 12873 of Lecture Notes in Computer Science, page 109-115. Springer, (2021)Structured Pruning with Automatic Pruning Rate Derivation for Image Processing Neural Networks.Y. Sakai, A. Iwakawa, and T. Tabaru. ISMSI, page 100-104. ACM, (2022)DropOut and DropConnect for Reliable Neuromorphic Inference under Energy and Bandwidth Constraints in Network Connectivity.Y. Sakai, B. Pedroni, S. Joshi, A. Akinin, and G. Cauwenberghs. AICAS, page 76-80. IEEE, (2019)Greedy Search Algorithm for Mixed Precision in Post-Training Quantization of Convolutional Neural Network Inspired by Submodular Optimization.S. Tsuji, H. Kawaguchi, A. Inoue, Y. Sakai, and F. Yamada. ACML, volume 157 of Proceedings of Machine Learning Research, page 886-901. PMLR, (2021)

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Disambiguation of "Sakai, Yasufumi"

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A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.

Please choose a person to relate this publication to

Hajime Sakai

Winfried Sakai

Noriyuki Sakai

Asato Sakai

Arito Rüdiger Sakai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sakai, Yasufumi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.

Please choose a person to relate this publication to

Hajime Sakai

Winfried Sakai

Noriyuki Sakai

Asato Sakai

Arito Rüdiger Sakai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.