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A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication., , , , and . VLSI-SoC (Selected Papers), volume 313 of IFIP Advances in Information and Communication Technology, page 232-250. Springer, (2008)Exploring transductive and inductive methods for vertex embedding in biological networks., , , and . RTSI, page 285-290. IEEE, (2019)Partial Dynamic Reconfiguration: The Caronte Approach. A New Degree of Freedom in the HW/SW Codesign., and . FPL, page 1-2. IEEE, (2006)A Case Study for an Accelerated DCNN on FPGA-Based Embedded Distributed System., , , , and . IPDPS Workshops, page 91-94. IEEE, (2019)Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices., , , , , and . ACM Great Lakes Symposium on VLSI, page 421-424. ACM, (2009)Operating system support for online partial dynamic reconfiguration management., , and . FPL, page 455-458. IEEE, (2008)On self-adaptive resource allocation through reinforcement learning., , , , , , , and . AHS, page 23-30. IEEE, (2013)FPGA-Based Embedded System Implementation of Audio Signal Alignment., , , and . IPDPS Workshops, page 132-139. IEEE, (2019)Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA., , , , , , and . ICSAMOS, page 107-114. IEEE, (2006)Towards a performance-as-a-service cloud., , , , , and . SoCC, page 26:1-26:2. ACM, (2013)