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Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology., , , , , , and . VLSI-SoC, page 168-173. IEEE, (2013)Comparison of 65nm LP bulk and LP PD-SOI with adaptive power gate body bias for an LDPC codec., , , , , , , and . ISSCC, page 336-337. IEEE, (2011)An Asynchronous Power Aware and Adaptive NoC Based Circuit., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 44 (4): 1167-1177 (2009)Power-Clock Generator Impact on the Performance of NEM-Based Quasi-Adiabatic Logic Circuits., , , , and . RC, volume 9138 of Lecture Notes in Computer Science, page 267-272. Springer, (2015)Design challenges for nano-scale devices., , , and . ESSDERC, page 69-72. IEEE, (2012)2021 Roadmap on Neuromorphic Computing and Engineering., , , , , , , , , and 46 other author(s). CoRR, (2021)A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs., , , , , , , , and . ESSCIRC, page 138-141. IEEE, (2008)Investigating Current-Based and Gating Approaches for Accurate and Energy-Efficient Spiking Recurrent Neural Networks., , , and . ICANN (3), volume 13531 of Lecture Notes in Computer Science, page 359-370. Springer, (2022)Are SNNs Really More Energy-Efficient Than ANNs? an In-Depth Hardware-Aware Study., , , and . IEEE Trans. Emerg. Top. Comput. Intell., 7 (3): 731-741 (June 2023)An efficient metric of setup time for pulsed flip-flops based on output transition time., , , , and . ICICDT, page 9-12. IEEE, (2013)