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Disambiguation of "Su, Chin-I"

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A fast readout circuit for an organic vertical nano-junction sensor.

, , , and . IEEE SENSORS, page 1-3. IEEE, (2016)

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Yeong-chin Su

I-hsin Su

Zoran Su i

Erika Chin

Elion Chin

 

Other publications of authors with the same name

8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 58 (1): 303-315 (2023)RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 56 (4): 1105-1115 (2021)A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices., , , , , , , , , and 8 other author(s). ISSCC, page 245-247. IEEE, (2021)A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices., , , , , , , , , and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices., , , , , , , , , and 4 other author(s). ISSCC, page 1-3. IEEE, (2022)Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window., , , , , , , , , and 4 other author(s). A-SSCC, page 13-16. IEEE, (2018)A fast readout circuit for an organic vertical nano-junction sensor., , , and . IEEE SENSORS, page 1-3. IEEE, (2016)An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM., , , , , , , , , and 2 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)