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Design space exploration of latency and bandwidth in RRAM-based solid state drives., , , , и . NVMTS, стр. 1-4. IEEE, (2015)Analysis and Design of Linear Finite State Machines for Signature Analysis Testing., , и . IEEE Trans. Computers, 40 (9): 1034-1045 (1991)Architectural and Integration Options for 3D NAND Flash Memories., , , и . Computers, 6 (3): 27 (2017)A novel critical path heuristic for fast fault grading., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (4): 544-548 (1991)Dynamic effects in the detection of bridging faults in CMOS ICs., , и . J. Electron. Test., 3 (3): 197-205 (1992)Improving performance and reliability of NOR-Flash arrays by using pulsed operation., , и . Microelectron. Reliab., 46 (9-11): 1478-1481 (2006)An Automated Test Equipment for Characterization of Emerging MRAM and RRAM Arrays., , , , , , , и . IEEE Trans. Emerg. Top. Comput., 6 (2): 269-277 (2018)On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing., , и . ITC, стр. 936. IEEE Computer Society, (1989)Overerase phenomena: an insight into flash memory reliability., , и . Proc. IEEE, 91 (4): 617-626 (2003)Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers., , , , , , и . ACM Trans. Embed. Comput. Syst., 14 (1): 7:1-7:24 (2015)