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Design of a Novel CNTFET-based Reconfigurable Logic Gate.

, , , and . ISVLSI, page 285-290. IEEE Computer Society, (2007)

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Towards reconfigurable optical networks on chip., , , , , , , , , and 2 other author(s). ReCoSoC, page 121-128. Univ. Montpellier II, (2005)Design Methodologies for High-Speed CMOS Photoreceiver Front-Ends., , , and . SBCCI, page 323-328. IEEE Computer Society, (2003)Towards a taxonomy of simulation tools for wireless sensor networks., , , and . SimuTools, page 52. ICST/ACM, (2010)Design of a Novel CNTFET-based Reconfigurable Logic Gate., , , and . ISVLSI, page 285-290. IEEE Computer Society, (2007)Simulation of Electrical and Optical Interconnections for Future VLSI ICs., , , , and . International Conference on Computational Science, volume 3039 of Lecture Notes in Computer Science, page 1037-1044. Springer, (2004)On-Chip Optical Interconnect for Low-Power., and . Ultra Low-Power Electronics and Design, Kluwer / Springer, (2004)CNTFET Modeling and Reconfigurable Logic-Circuit Design., , , , , , , , , and 2 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (11): 2365-2379 (2007)Heterogeneous Modelling of an Optical Network-on-Chip with SystemC., , , , , and . IEEE International Workshop on Rapid System Prototyping, page 10-16. IEEE Computer Society, (2005)A complete system-level behavioural model for IEEE 802.15.4 Wireless Sensor Network simulations., , , and . ISCAS, page 3917-3920. IEEE, (2010)FLAG: a flexible layout generator for analog MOS transistors., , , , and . IEEE J. Solid State Circuits, 33 (6): 896-903 (1998)