From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

An ultra-low-power and mixed-mode event-driven face detection SoC for always-on mobile applications., , , , , и . ESSCIRC, стр. 255-258. IEEE, (2017)10.4 A 1.22TOPS and 1.52mW/MHz augmented reality multi-core processor with neural network NoC for HMD applications., , , , , , , , , и . ISSCC, стр. 182-183. IEEE, (2014)2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical Applications., , , , , , , , , и 56 other автор(ы). ISSCC, стр. 42-44. IEEE, (2024)A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices., , , , и . ISCAS, стр. 1-5. IEEE, (2018)A 0.5V, 6.2μW, 0.059mm2 Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing., , , и . CoRR, (2024)DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-Time Image Segmentation on Mobile Devices., , , , и . ISCAS, стр. 1-5. IEEE, (2019)CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices., , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (4): 598-611 (2019)CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture., , , и . AICAS, стр. 38-41. IEEE, (2019)4.6 A1.93TOPS/W scalable deep learning/inference processor with tetra-parallel MIMD architecture for big-data applications., , , , , и . ISSCC, стр. 1-3. IEEE, (2015)Low-Power Convolutional Neural Network Processor for a Face-Recognition System., , , и . IEEE Micro, 37 (6): 30-38 (2017)