Author of the publication

Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking.

, , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1513-1517 (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

PSL Model Checking and Run-Time Verification Via Testers., and . FM, volume 4085 of Lecture Notes in Computer Science, page 573-586. Springer, (2006)Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1513-1517 (2008)Towards ML Engineering: A Brief History Of TensorFlow Extended (TFX)., , , , , , , , , and 9 other author(s). CoRR, (2020)Monitoring Interfaces for Faults., , and . RV@CAV, volume 144 of Electronic Notes in Theoretical Computer Science, page 73-89. Elsevier, (2005)On the Merits of Temporal Testers., and . 25 Years of Model Checking, volume 5000 of Lecture Notes in Computer Science, page 172-195. Springer, (2008)Formal Verification Using Static and Dynamic Analyses.. New York University, USA, (2007)