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Disambiguation of "Cadambi, Srihari"

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Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking.

, , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1513-1517 (2008)

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Srihari Narasimhan

Srihari Dodla

 

Other publications of authors with the same name

Data-aware scheduling of legacy kernels on heterogeneous platforms with distributed memory., , , and . SPAA, page 82-91. ACM, (2010)Memory-Efficient Regular Expression Search Using State Merging., and . INFOCOM, page 1064-1072. IEEE, (2007)A Coprocessor Sharing-Aware Scheduler for Xeon Phi-Based Compute Clusters., , and . IPDPS, page 337-346. IEEE Computer Society, (2014)PipeRench: A Coprocessor for Streaming multimedia Acceleration., , , , , , and . ISCA, page 28-39. IEEE Computer Society, (1999)Static Profile-Driven Compilation for FPGAs., and . FPL, volume 2147 of Lecture Notes in Computer Science, page 112-122. Springer, (2001)Pipeline Reconfigurable FPGAs., , , and . VLSI Signal Processing, 24 (2-3): 129-146 (2000)A Massively Parallel, Energy Efficient Programmable Accelerator for Learning and Classification., , , , and . ACM Trans. Archit. Code Optim., 9 (1): 6:1-6:30 (2012)Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1513-1517 (2008)A dynamically configurable coprocessor for convolutional neural networks., , , and . ISCA, page 247-257. ACM, (2010)A Massively Parallel Coprocessor for Convolutional Neural Networks., , , , , , and . ASAP, page 53-60. IEEE Computer Society, (2009)