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Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (5): 760-773 (2011)Optimized self-tuning for circuit aging., , , , , , , and . DATE, page 586-591. IEEE Computer Society, (2010)Cross-Layer Modeling and Simulation of Circuit Reliability., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (1): 8-23 (2014)A self-evolving design methodology for power efficient multi-core systems., , , , , , and . ICCAD, page 264-268. IEEE, (2010)Statistical aging under dynamic voltage scaling: A logarithmic model approach., , , , , and . CICC, page 1-4. IEEE, (2012)A self-tuning design methodology for power-efficient multi-core systems., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 18 (1): 4:1-4:24 (2012)Circuit aging prediction for low-power operation., , , , , , , and . CICC, page 427-430. IEEE, (2009)Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets., , , and . IRPS, page 2. IEEE, (2015)Design sensitivity of single event transients in scaled logic circuits., , , and . DAC, page 694-699. ACM, (2011)In-situ characterization and extraction of SRAM variability., , , , , , , and . DAC, page 711-716. ACM, (2010)