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A Low-Power Multithreaded Processor for Software Defined Radio., , , , , and . VLSI Signal Processing, 43 (2-3): 143-159 (2006)A Decimal Floating-Point Divider Using Newton-Raphson Iteration., and . VLSI Signal Processing, 49 (1): 3-18 (2007)Parallel saturating multioperand adders., , , and . CASES, page 172-179. ACM, (2000)FPGA Resource Reduction Through Truncated Multiplication., , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 574-583. Springer, (2001)Energy-efficient floating-point arithmetic for digital signal processors., , and . ACSCC, page 1823-1827. IEEE, (2011)Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 747-758 (2014)CORDIC-based LMMSE equalizer for Software Defined Radio., , , , , , and . ICSAMOS, page 301-308. IEEE, (2010)Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latency., , and . MICRO, page 74-85. ACM, (2013)Accurate Function Approximations by Symmetric Table Lookup and Addition., and . ASAP, page 144-153. IEEE Computer Society, (1997)Lossless and lossy memory I/O link compression for improving performance of GPGPU workloads., , and . PACT, page 325-334. ACM, (2012)