( en | de | ru )

 

Disambiguation of "Obata, Koji"

Author of the publication

copydeleteadd this publication to your clipboard
A 97.99 dB SNDR, 2 kHz BW, 37.1 µW noise-shaping SAR ADC with dynamic element matching and modulation dither effect.

, , , , and . VLSI Circuits, page 1-2. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Koji Kameo

Koji Onoda

Koji Ota

Tomoko Kojima

Hajime Kojima

 

Other publications of authors with the same name

Integrated Line Driver for Digital Pulse-Width Modulation Driven AMOLED Displays on Flex., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 50 (1): 282-290 (2015)A 71dB-SNDR 50MS/s 4.2mW CMOS SAR ADC by SNR enhancement techniques utilizing noise., , , , , , , and . ISSCC, page 272-273. IEEE, (2013)A Low Distortion 3rd-Order Continuous-Time Delta-Sigma Modulator for a Worldwide Digital TV-Receiver., , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 95-A (2): 471-478 (2012)A Method of Sequential Circuit Synthesis Using One-Hot Encoding for Single-Flux-Quantum Digital Circuits., , and . IEICE Trans. Electron., 90-C (12): 2278-2284 (2007)30.2 Digital PWM-driven AMOLED display on flex reducing static power consumption., , , , , , , , , and 4 other author(s). ISSCC, page 488-489. IEEE, (2014)A transduction-based framework to synthesize RSFQ circuits., , , , and . ASP-DAC, page 266-272. IEEE, (2006)A 10 MHz BW 50 fJ/conv. continuous time ΔΣ modulator with high-order single opamp integrator using optimization-based design method., , , and . VLSIC, page 160-161. IEEE, (2012)A Fifth-Order Continuous-Time Delta-Sigma Modulator With Single-Opamp Resonator., , , , , and . IEEE J. Solid State Circuits, 45 (4): 697-706 (2010)A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques., , , , , , , and . IEEE J. Solid State Circuits, 50 (6): 1372-1381 (2015)A Clock Scheduling Algorithm for High-Throughput RSFQ Digital Circuits., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (12): 3772-3782 (2008)