Author of the publication

Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing.

, , , , and . SBCCI, page 30-35. ACM, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A tool for automatic design of analog circuits based on gm/ID methodology., , and . ISCAS, IEEE, (2006)Design and FPGA Prototyping of a H.264/AVC Main Profile., , , , , , , , and . J. Braz. Comput. Soc., 13 (1): 25-36 (2007)Low-energy motion estimation memory system with dynamic management., , , , , , and . J. Real Time Image Process., 18 (6): 2495-2510 (2021)Robustness Analysis of 3-2 Adder Compressor Designed in 7-nm FinFET Technology., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 1264-1268 (March 2023)A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers., , , , , , and . IEEE Trans. Computers, 71 (2): 349-363 (2022)A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders., , , , , and . IEEE Trans. Circuits Syst. Video Technol., 30 (10): 3814-3828 (2020)Energy-Throughput Configurable Design for Video Processing Binary Arithmetic Encoder., , , and . IEEE Trans. Circuits Syst. Video Technol., 31 (3): 1163-1177 (2021)AxPPA: Approximate Parallel Prefix Adders., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (1): 17-28 (2023)Exploring NLMS-Based Adaptive Filter Hardware Architectures for Eliminating Power Line Interference in EEG Signals., , , , , , and . Circuits Syst. Signal Process., 40 (7): 3305-3337 (2021)Low-power fast Fourier transform hardware architecture combining a split-radix butterfly and efficient adder compressors., , , , , , and . IET Comput. Digit. Tech., 15 (3): 230-240 (2021)