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Disambiguation of "Becker, Jürgen"

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Low-latency inter-domain communication on the Xen hypervisor.

, , and . MCSoC, page 340-346. IEEE, (2023)

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Jürgen Becker

Jürgen Becker

Jürgen Becker

Jürgen Becker

Jürgen Becker

 

Other publications of authors with the same name

Data Readout Triggering for Phase 2 of the Belle II Particle Detector Experiment Based on Neural Networks., , and . SoCC, page 174-179. IEEE, (2018)Leveraging the Partial Reconfiguration Capability of FPGAs for Processor-Based Fail-Operational Systems., , , , and . ARC, volume 11444 of Lecture Notes in Computer Science, page 96-111. Springer, (2019)Interference-Aware Memory Allocation for Real-Time Multi-Core Systems., and . RTAS, page 148-159. IEEE, (2020)CNNParted: An open source framework for efficient Convolutional Neural Network inference partitioning in embedded systems., , , , , , , and . Comput. Networks, (June 2023)Achieving cost-efficient fail-operational behavior based on inherent redundancy at the system level., , , , and . Microprocess. Microsystems, (November 2021)Single-Laser 325 Tbit/s Nyquist WDM Transmission., , , , , , , , , and 17 other author(s). JOCN, 4 (10): 715-723 (2012)Colorless FDMA-PON With Flexible Bandwidth Allocation and Colorless, Low-Speed ONUs Invited., , , , , , , , , and 6 other author(s). JOCN, 5 (10): A204-A212 (2013)Worst-Case Execution-Time-Aware Parallelization of Model-Based Avionics Applications., , , , , , , , , and 6 other author(s). J. Aerosp. Inf. Syst., 16 (11): 521-533 (November 2019)High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring., , and . LASCAS, page 1-4. IEEE, (2021)A Secure Keyflashing Framework for Access Systems in Highly Mobile Devices., , , , and . ReCoSoC, volume 7551 of KIT Scientific Reports, page 121-126. KIT Scientific Publishing, (2010)