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A heterogeneous low-cost and low-latency Ring-Chain network for GPGPUs.

, , , , and . ICCD, page 472-479. IEEE Computer Society, (2016)

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Low-level behavioral analysis of the JVT/AVC decoder., , , , and . VCIP, volume 5308 of SPIE Proceedings, SPIE, (2004)Accurate memory data flow modeling in statistical simulation., , and . ICS, page 87-96. ACM, (2006)Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor., , , , , and . ROSS@ICS, page 7:1-7:7. ACM, (2014)Shared resource aware scheduling on power-constrained tiled many-core processors., , , , , and . Conf. Computing Frontiers, page 365-368. ACM, (2016)Cole: compiler optimization level exploration., and . CGO, page 165-174. ACM, (2008)Chrysso: an integrated power manager for constrained many-core processors., , , , , , , and . Conf. Computing Frontiers, page 19:1-19:8. ACM, (2015)Statistically rigorous java performance evaluation., , and . OOPSLA, page 57-76. ACM, (2007)AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors., , and . MICRO, page 125-136. IEEE Computer Society, (2010)Scale-Model Architectural Simulation., , , , and . ISPASS, page 58-68. IEEE, (2022)Offline Phase Analysis and Optimization for Multi-configuration Processors., , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 202-211. Springer, (2005)