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Hardware implementation of a fingerprinting algorithm suited for digital cinema.

, , , , , and . EUSIPCO, page 1497-1500. IEEE, (2004)

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A survey on industrial vision systems, applications and tools, , , , and . Image and Vision Computing, 21 (2): 171 - 188 (2003)An efficient metric of setup time for pulsed flip-flops based on output transition time., , , , and . ICICDT, page 9-12. IEEE, (2013)A fully-synthesized 20-gate digital spike-based synapse with embedded online learning., , , and . ISCAS, page 1-4. IEEE, (2017)Implementation of very large dataflow graphs on a reconfigurable architecture for robotic applications., , , and . IPDPS, page 143. IEEE Computer Society, (2001)Efficient FPGA Implementation of Block Cipher MISTY1., , , and . IPDPS, page 185. IEEE Computer Society, (2003)A VLSI System for Neural Bayesian and LVQ Classification., , , , and . IWANN, volume 930 of Lecture Notes in Computer Science, page 696-703. Springer, (1995)Low-Cost Elliptic Curve Digital Signature Coprocessor for Smart Cards., , , , and . ASAP, page 347-353. IEEE Computer Society, (2006)Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis., , , and . IEEE Trans. Computers, 52 (4): 473-482 (2003)Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits., , and . ISLPED, page 21-26. ACM, (2009)Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic., , , and . ISLPED, page 3-8. ACM, (2009)