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On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation.

, , , , and . ISCAS, page 1979-1982. IEEE, (2010)

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Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus., , and . IEEE Trans. Instrumentation and Measurement, 60 (2): 452-461 (2011)Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS., , and . SBCCI, page 21-26. ACM, (2007)Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy., , and . ISCAS, page 1-5. IEEE, (2020)A methodology for defect detection in analog circuits based on causal feature selection., , , and . ICECS 2022, page 1-4. IEEE, (2022)Static linearity BIST for Vcm-based switching SAR ADCs using a reduced-code measurement technique., , , and . NEWCAS, page 295-298. IEEE, (2020)Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator., , , , , , and . ETS, page 1-6. IEEE, (2016)Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs., , and . ISCAS, IEEE, (2006)Full calibration digital techniques for pipeline ADCs., , and . ISCAS (3), page 1976-1979. IEEE, (2005)Digital Non-Linearity Calibration for ADCs With Redundancy Using a New LUT Approach., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (8): 3197-3210 (2021)A survey on digital background calibration of ADCs., , and . ECCTD, page 101-104. IEEE, (2009)