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On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation.

, , , , and . ISCAS, page 1979-1982. IEEE, (2010)

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SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems., , , , and . DAC, page 281-286. ACM Press, (1997)Structural testing of pipelined analog to digital converters., , and . ISCAS (1), page 436-439. IEEE, (2001)Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS., , and . SBCCI, page 21-26. ACM, (2007)Normalized Nonlinear Semiempirical MOST Model Used in Monolithic RF Class A-to-C PAs., , , and . Circuits Syst. Signal Process., 39 (6): 2796-2821 (2020)Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell., , , , and . IEEE Des. Test Comput., 19 (6): 73-82 (2002)Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus., , and . IEEE Trans. Instrumentation and Measurement, 60 (2): 452-461 (2011)INL systematic reduced-test technique for Pipeline ADCs., , and . ETS, page 1-6. IEEE, (2014)Calibration of Capacitor Mismatch and Static Comparator Offset in SAR ADC with Digital Redundancy., , and . ISCAS, page 1-5. IEEE, (2020)Statistical behavioral modeling and characterization of A/D converters., , and . ICCAD, page 562-566. IEEE Computer Society / ACM, (1995)Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator., , , , , , and . ETS, page 1-6. IEEE, (2016)