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Disambiguation of "Krishnamurthy, Harish K."

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A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS.

, , , , , , , , , and . IEEE J. Solid State Circuits, 56 (4): 1141-1151 (2021)

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Mahalakshmi Krishnamurthy

Adarsh Krishnamurthy

Arvind Krishnamurthy

Harish Balasubramaniam

Harish Kommera

 

Other publications of authors with the same name

Reduction of Torque Ripple in Induction Motor Drives Using an Advanced Hybrid PWM Technique., , , , and . IEEE Trans. Ind. Electron., 57 (6): 2085-2091 (2010)Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing., , , , , , , , , and 1 other author(s). ISSCC, page 262-264. IEEE, (2021)14.9 A Monolithic 10.5W/mm2600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS., , , , , , , , , and 4 other author(s). ISSCC, page 270-272. IEEE, (2024)A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 54 (12): 3316-3325 (2019)A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors., , , , , , , , , and 7 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 56 (4): 1141-1151 (2021)A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation., , , , , , , and . ISSCC, page 234-236. IEEE, (2019)A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response., , , , , , , and . IEEE J. Solid State Circuits, 55 (4): 977-987 (2020)A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction., , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2021)A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response., , , , , , , and . VLSI Circuits, page 124-. IEEE, (2019)