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Diagnozer: A laboratory tool for teaching research in diagnosis of electronic systems.

, , , , and . MSE, page 12-15. IEEE Computer Society, (2009)

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Effective Scalable IEEE 1687 Instrumentation Network for Fault Management., , and . IEEE Des. Test, 30 (5): 26-35 (2013)Structural fault collapsing by superposition of BDDs for test generation in digital circuits., , , and . ISQED, page 250-257. IEEE, (2010)HLS-based Optimization of Tau Triggering Algorithm for LHC: a case study., , , and . CoRR, (2022)Fault Simulation with Parallel Critical Path Tracing for Combinatorial Circuits Using Structurally Synthesized BDDs., , , and . LATW, page 97-102. IEEE, (2006)Timing simulation of digital circuits with binary decision diagrams., , and . DATE, page 460-466. IEEE Computer Society, (2001)Calculation of LFSR Seed and Polynomial Pair for BIST Applications., , and . DDECS, page 275-278. IEEE Computer Society, (2008)Structurally Synthesized Multiple Input BDDs for Speeding Up Logic-Level Simulation of Digital Circuits., , , , and . DSD, page 658-663. IEEE Computer Society, (2010)At-speed on-chip diagnosis of board-level interconnect faults.. ETS, page 2-7. IEEE Computer Society, (2004)On in-system programming of non-volatile memories., , , and . MIXDES, page 408-413. IEEE, (2013)BASTION: Board and SoC test instrumentation for ageing and no failure found., , , , , , , , and . DATE, page 115-120. IEEE, (2017)