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Diagnozer: A laboratory tool for teaching research in diagnosis of electronic systems.

, , , , and . MSE, page 12-15. IEEE Computer Society, (2009)

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Embedded fault diagnosis in digital systems with BIST., , and . Microprocess. Microsystems, 32 (5-6): 279-287 (2008)Hierarchical Timing-Critical Paths Analysis in Sequential Circuits., , , , , and . PATMOS, page 1-6. IEEE, (2018)Block-Level Fault Model-Free Debug and Diagnosis in Digital Systems., , and . DSD, page 229-232. IEEE Computer Society, (2009)Parallel Critical Path Tracing Fault Simulation in Sequential Circuits., , , , and . MIXDES, page 305-310. IEEE, (2018)Synthesis of multiple fault oriented test groups from single fault test sets., , and . DTIS, page 98-103. IEEE, (2013)A tool set for teaching design-for-testability of digital circuits., , and . EWME, page 1-6. IEEE, (2016)Investigations of the diagnosibility of digital networks with BIST., , and . LATW, page 1-6. IEEE, (2009)How to Prove that a Circuit is Fault-Free?, , and . DSD, page 427-430. IEEE Computer Society, (2012)Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG., , , , , , , , , and 1 other author(s). LATS, page 1-6. IEEE Computer Society, (2015)A novel random approach to diagnostic test generation., , , and . NORCAS, page 1-4. IEEE, (2016)