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Disambiguation of "Richter, Edward"

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Accelerated Shadow Detection and Removal Method.

, , , , , and . AICCSA, page 1-8. IEEE Computer Society, (2019)

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Edward Zahn

Edward Hartstein

Edward Dotzel

Edward Birkenbeil

Edward Haub

 

Other publications of authors with the same name

Accelerated Shadow Detection and Removal Method., , , , , and . AICCSA, page 1-8. IEEE Computer Society, (2019)Balancing the learning ability and memory demand of a perceptron-based dynamically trainable neural network., , , , and . J. Supercomput., 74 (7): 3211-3235 (2018)DML: Dynamic Partial Reconfiguration With Scalable Task Scheduling for Multi-Applications on FPGAs., , , , , , and . IEEE Trans. Computers, 71 (10): 2577-2591 (2022)Safer Illinois and RokWall: Privacy Preserving University Health Apps for COVID-19., , , , , , , , , and 7 other author(s). CoRR, (2021)Application-Specific Autonomic Cache Tuning for General Purpose GPUs., , , , , and . ICCAC, page 104-113. IEEE Computer Society, (2017)FPGA Based Emulation Environment for Neuromorphic Architectures., , , , , , , , , and . IPDPS Workshops, page 90-97. IEEE, (2020)Qilin: Enabling Performance Analysis and Optimization of Shared-Virtual Memory Systems with FPGA Accelerators., and . ICCAD, page 23:1-23:9. ACM, (2022)RANC: Reconfigurable Architecture for Neuromorphic Computing., , , , , , , , , and 1 other author(s). CoRR, (2020)RANC: Reconfigurable Architecture for Neuromorphic Computing., , , , , , , , , and 1 other author(s). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (11): 2265-2278 (2021)FSSD: FPGA-Based Emulator for SSDs., , , , , , , and . FPL, page 101-108. IEEE, (2023)