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Effective file data-block placement for different types of page cache on hybrid main memory architectures.

P. Dai, Q. Zhuge, X. Chen, W. Jiang, and E. Sha. Des. Autom. Embed. Syst., 17 (3-4): 485-506 (2013)

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Efficient task assignment and scheduling for MPSoC DSPS with VS-SPM considering concurrent accesses through data allocation.S. Gu, Q. Zhuge, J. Hu, J. Yi, and E. Sha. ICASSP, page 2615-2619. IEEE, (2013)User Experience Enhanced Task Scheduling and Processor Frequency Scaling for Energy-Sensitive Mobile Devices.J. Dai, W. Liu, X. Lin, Y. Ye, C. Xiao, K. Wu, Q. Zhuge, and E. Sha. HPCC/CSS/ICESS, page 941-944. IEEE, (2015)Realistic Task Parallelization of the H.264 Decoding Algorithm for Multiprocessors.X. Lin, W. Liu, C. Xiao, J. Dai, X. Luo, D. Zhang, D. Liu, K. Wu, Q. Zhuge, and E. Sha. HPCC/CSS/ICESS, page 871-874. IEEE, (2015)Towards the design of efficient hash-based indexing scheme for growing databases on non-volatile memory.Z. Ma, E. Sha, Q. Zhuge, W. Jiang, R. Zhang, and S. Gu. Future Gener. Comput. Syst., (2020)Algorithms for Optimally Arranging Multicore Memory Structures.W. Tseng, J. Hu, Q. Zhuge, Y. He, and E. Sha. EURASIP J. Embed. Syst., (2010)Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors.J. Hu, Q. Zhuge, C. Xue, W. Tseng, and E. Sha. ACM Trans. Embed. Comput. Syst., 13 (4): 79:1-79:25 (2014)Data Placement and Duplication for Embedded Multicore Systems With Scratch Pad Memory.Y. Guo, Q. Zhuge, J. Hu, J. Yi, M. Qiu, and E. Sha. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (6): 809-817 (2013)Application-Specific Wear Leveling for Extending Lifetime of Phase Change Memory in Embedded Systems.D. Liu, T. Wang, Y. Wang, Z. Shao, Q. Zhuge, and E. Sha. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (10): 1450-1462 (2014)Loop scheduling with timing and switching-activity minimization for VLIW DSP.Z. Shao, B. Xiao, C. Xue, Q. Zhuge, and E. Sha. ACM Trans. Design Autom. Electr. Syst., 11 (1): 165-185 (2006)General loop fusion technique for nested loops considering timing and code size.M. Liu, Q. Zhuge, Z. Shao, and E. Sha. CASES, page 190-201. ACM, (2004)

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Disambiguation of "Zhuge, Qingfeng"

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Effective file data-block placement for different types of page cache on hybrid main memory architectures.

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Disambiguation of "Zhuge, Qingfeng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Effective file data-block placement for different types of page cache on hybrid main memory architectures.

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Effective file data-block placement for different types of page cache on hybrid main memory architectures.