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On How to Improve FPGA-Based Systems Design Productivity via SDAccel.

, , , , , and . IPDPS Workshops, page 247-252. IEEE Computer Society, (2016)

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SMASH: A heuristic methodology for designing partially reconfigurable MPSoCs., , , , and . RSP, page 102-108. IEEE, (2013)The autonomic operating system research project: achievements and future directions., , , , , and . DAC, page 77:1-77:10. ACM, (2013)TaBit: A framework for task graph to bitstream generation., , , , , and . ICSAMOS, page 201-208. IEEE, (2012)Exploiting FPGAs from Higher Level Languages A Signal Analysis Case Study., , , and . IPDPS Workshops, page 132-140. IEEE Computer Society, (2017)Automatic run-time manager generation for reconfigurable MPSoC architectures., , , , and . ReCoSoC, page 1-8. IEEE, (2012)Towards exascale computing with heterogeneous architectures., , , and . DATE, page 398-403. IEEE, (2017)On how to efficiently accelerate brain network analysis on FPGA-based computing system., , , , , and . ReConFig, page 1-6. IEEE, (2015)GPU-based computation for brain spatio-temporal networks definition., , , , , , and . EMBC, page 1493-1496. IEEE, (2017)A Flexible Interconnection Structure for Reconfigurable FPGA Dataflow Applications., , , , , and . IPDPS Workshops, page 192-201. IEEE, (2013)Towards a performance-as-a-service cloud., , , , , and . SoCC, page 26:1-26:2. ACM, (2013)