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Power-Gated 9T SRAM Cell for Low-Energy Operation.

, , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 1183-1187 (2017)

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Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

 

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Dynamic mixed serial-parallel content addressable memory (DMSP CAM)., , , и . I. J. Circuit Theory and Applications, 41 (7): 721-731 (2013)Power-Gated 9T SRAM Cell for Low-Energy Operation., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 1183-1187 (2017)Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (6): 1444-1455 (2017)One-Sided Static Noise Margin and Gaussian-Tail-Fitting Method for SRAM., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 22 (6): 1262-1269 (2014)Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM., , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (4): 1062-1070 (2015)A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface., , , , , , , , , и 24 other автор(ы). ISSCC, стр. 136-137. IEEE, (2022)Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2748-2752 (2015)Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 752-765 (2015)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis., , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (8): 2063-2072 (2017)