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Performance Characterization of Itanium® 2-Based Montecito Processor.

, , , , , , и . SPEC Benchmark Workshop, том 5419 из Lecture Notes in Computer Science, стр. 36-56. Springer, (2009)

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Performance Characterization of Itanium® 2-Based Montecito Processor., , , , , , и . SPEC Benchmark Workshop, том 5419 из Lecture Notes in Computer Science, стр. 36-56. Springer, (2009)A Compilation and Run-Time Framework for Maximizing Performance of Self-scheduling Algorithms., , , , и . NPC, том 8707 из Lecture Notes in Computer Science, стр. 459-470. Springer, (2014)A Hierarchical Parallelizing Compiler for VLIW/MIMD Machines., и . LCPC, том 757 из Lecture Notes in Computer Science, стр. 49-63. Springer, (1992)Enhanced Loop Coalescing: A Compiler Technique for Transforming Non-uniform Iteration Spaces., , и . ISHPC, том 4759 из Lecture Notes in Computer Science, стр. 17-32. Springer, (2005)Optimizing Program Performance via Similarity, Using a Feature-Agnostic Approach., , , и . APPT, том 8299 из Lecture Notes in Computer Science, стр. 199-213. Springer, (2013)Using Hardware Counters to Predict Vectorization., , , , , и . LCPC, том 11403 из Lecture Notes in Computer Science, стр. 3-16. Springer, (2017)A hierarchical approach to instruction-level parallelization., и . Int. J. Parallel Program., 23 (1): 35-62 (1995)Annotating the Java Bytecodes in Support of Optimization., , , и . Concurr. Pract. Exp., 9 (11): 1003-1016 (1997)Memory aware compilation through accurate timing extraction., , и . DAC, стр. 316-321. ACM, (2000)Measuring the Parallelism Available for Very Long Instruction Word Architectures., и . IEEE Trans. Computers, 33 (11): 968-976 (1984)