Author of the publication

Scan-Based Delay Test Types and Their Effect on Power Dissipation During Test.

, and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (2): 398-403 (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Incomplete Tests for Undetectable Faults to Improve Test Set Quality.. ACM Trans. Design Autom. Electr. Syst., 24 (2): 23:1-23:13 (2019)A method for diagnosing implementation errors in synchronous sequential circuits and its implications on synthesis., and . EURO-DAC, page 252-258. IEEE Computer Society, (1993)Improving the stuck-at fault coverage of functional test sequences by using limited-scan operations., and . IEEE Trans. Very Large Scale Integr. Syst., 12 (7): 780-788 (2004)Selecting Functional Test Sequences for Defect Diagnosis.. IEEE Trans. Very Large Scale Integr. Syst., 26 (10): 2160-2164 (2018)Generation of Mixed Test Sets for Transition Faults.. IEEE Trans. Very Large Scale Integr. Syst., 20 (10): 1895-1899 (2012)Computing Two-Pattern Test Cubes for Transition Path Delay Faults.. IEEE Trans. Very Large Scale Integr. Syst., 21 (3): 475-485 (2013)A Test Selection Procedure for Improving the Accuracy of Defect Diagnosis.. IEEE Trans. Very Large Scale Integr. Syst., 24 (8): 2759-2767 (2016)On Functional Broadside Tests With Functional Propagation Conditions., and . IEEE Trans. Very Large Scale Integr. Syst., 19 (6): 1094-1098 (2011)Switching Activity as a Test Compaction Heuristic for Transition Faults., and . IEEE Trans. Very Large Scale Integr. Syst., 18 (9): 1357-1361 (2010)Padding of Multicycle Broadside and Skewed-Load Tests.. IEEE Trans. Very Large Scale Integr. Syst., 27 (11): 2587-2595 (2019)