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Disambiguation of "Lallement, Guenole"

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Bio-inspired pH sensing using ion sensitive field effect transistors.

, , and . ISCAS, page 2835-2838. IEEE, (2016)

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Alex Lallement

Raphaël Lallement

Régis Claude Lallement

 

Other publications of authors with the same name

Q-Learning-based Adaptive Power Management for IoT System-on-Chips with Embedded Power States., , , , and . ISCAS, page 1-5. IEEE, (2018)Bio-inspired pH sensing using ion sensitive field effect transistors., , and . ISCAS, page 2835-2838. IEEE, (2016)A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI., , , , , and . ESSCIRC, page 153-162. IEEE, (2017)CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 57 (4): 1013-1026 (2022)A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI., , , , , and . IEEE J. Solid State Circuits, 53 (7): 2088-2100 (2018)A 0.40pJ/cycle 981 μm2 voltage scalable digital frequency generator for SoC clocking., , , , , and . A-SSCC, page 69-72. IEEE, (2017)A 140 nW, 32.768 kHz, 1.9 ppm/°C Leakage-Based Digitally Relocked Clock Reference with 0.1 ppm Long-Term Stability in 28nm FD-SOI., , , , and . A-SSCC, page 197-200. IEEE, (2018)CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference., , , , , , , , , and 8 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)Testbench on a Chip: A Yield Test Vehicle for Resistive Memory Devices., , , , , , , , and . ISQED, page 1-7. IEEE, (2023)