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Effective Resistance of a Two Layer Mesh.

, and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (11): 739-743 (2011)

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Low power repeaters driving RC interconnects with delay and bandwidth constraints., and . SoCC, page 335-339. IEEE, (2004)Clock tree layout design for reduced delay uncertainty., , and . SoCC, page 179-180. IEEE, (2004)Equivalent rise time for resonance in power/ground noise estimation., , , and . ISCAS, page 2422-2425. IEEE, (2008)Inductance/area/resistance tradeoffs in high performance power distribution grids., and . ISCAS (1), page 101-104. IEEE, (2002)Compact substrate models for efficient noise coupling and signal isolation analysis., , , , , and . ISCAS, page 2346-2349. IEEE, (2010)Circuit Synthesis of Clock Distribution Networks Based on Non-Zero Clock Skew., and . ISCAS, page 175-178. IEEE, (1994)Decoupling technique and crosstalk analysis for coupled RLC interconnects., and . ISCAS (2), page 521-524. IEEE, (2004)Monotonicity Constraints on Path Delays for Efficient Retiming with Localized Clock Skew and Variable Register Delay., , and . ISCAS, page 1748-1751. IEEE, (1995)Forward body biased keeper for enhanced noise immunity in domino logic circuits., and . ISCAS (2), page 917-920. IEEE, (2004)Signal waveform characterization in RLC trees., , and . ISCAS (6), page 190-193. IEEE, (1999)