( en | de | ru )

 

Disambiguation of "Lupo, Nicola"

Author of the publication

copydeleteadd this publication to your clipboard
An integrated rad-hard test-vehicle for embedded emerging memories.

, , , and . ICECS, page 5-8. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Isabel Lupold

Tanja Lupo

Domenico Lupo

Rolf Lupold

Vito Antonio Lupo

 

Other publications of authors with the same name

On the Linearity of BJT-Based Current-Mode DAC Drivers., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (9): 3138-3142 (2021)A 1.5-ns Switching Time, 9-Bit Current-Mode DAC for High Speed Laser Diode Drivers., , , , , , and . ISCAS, page 1-5. IEEE, (2020)A Cross-Coupled Redundant Sense Amplifier for Radiation Hardened SRAMs., , and . NGCAS, page 61-64. IEEE, (2017)An Approximated Verilog-A Model for Memristive Devices., , , , and . ISCAS, page 1-5. IEEE, (2018)Study of DAC Architectures for Integrated Laser Driver Systems., , , , , , and . ISCAS, page 1-5. IEEE, (2019)An integrated rad-hard test-vehicle for embedded emerging memories., , , and . ICECS, page 5-8. IEEE, (2016)A Voltage-Time Model for Memristive Devices., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (8): 1452-1460 (2018)Analysis of Parasitic Effects in Filamentary-Switching Memristive Memories Using an Approximated Verilog-A Memristor Model., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (5): 1935-1947 (2019)Design of resistive non-volatile memories for rad-hard applications., , , , and . ISCAS, page 1594-1597. IEEE, (2016)