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A Stochastic Framework for Co-synthesis of Real-Time Systems., and . LCTES, volume 1985 of Lecture Notes in Computer Science, page 96-113. Springer, (2000)TOPS: A Target-Oriented Partial Scan Design Package Based on Simulated Annealing., and . VLSI Design, 2 (3): 233-239 (1994)Testability-Driven Layout of Combinational Circuits., and . VLSI Design, 7 (4): 347-352 (1998)Variation-Tolerant, Power-Safe Pattern Generation., , and . IEEE Des. Test Comput., 24 (4): 374-384 (2007)Conference Reports., and . IEEE Des. Test Comput., 24 (2): 202-203 (2007)Adaptive Routing Based on Deadlock Recovery., and . Euro-Par, volume 1470 of Lecture Notes in Computer Science, page 981-988. Springer, (1998)A functional-level testability measure for register-level circuits and its estimation., , and . Microprocess. Microsystems, 22 (9): 535-542 (1999)Parallel search-and-learn technique for solving large scale travelling-salesperson problems.. Knowl. Based Syst., 7 (3): 169-176 (1994)Kautz graphs as attractive logical topologies in multihop lightwave networks., , and . Comput. Commun., 20 (14): 1259-1270 (1997)Parallel Placement on Hypercube Architecture., and . ICPP (3), page 97-101. Pennsylvania State University Press, (1989)0-271-00686-2.