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HLS-Based Performance and Resource Optimization of Cryptographic Modules., , , and . ISPA/IUCC/BDCloud/SocialCom/SustainCom, page 1009-1016. IEEE, (2018)Reliable Fail-Operational Automotive E/E-Architectures by Dynamic Redundancy and Reconfiguration., , , and . SoCC, page 203-208. IEEE, (2019)A combined lattice BGK/level set method for immiscible two-phase flows., , , , and . Comput. Math. Appl., 58 (5): 950-964 (2009)A WCET-aware parallel programming model for predictability enhanced multi-core architectures., , , , , and . DATE, page 943-948. IEEE, (2018)V-FPGAs: Increasing Performance with Manual Placement, Timing Extraction and Extended Timing Modeling., , and . J. Signal Process. Syst., 94 (9): 865-882 (2022)An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC., , , , , , , , , and 2 other author(s). IEEE Des. Test Comput., 25 (5): 442-451 (2008)An Adaptive Lockstep Architecture for Mixed-Criticality Systems., , , and . ISVLSI, page 7-12. IEEE, (2021)Evaluation of a Hypervisor-Based Smart Controller for Industry 4.0 Functions in Manufacturing., , , and . WF-IoT, page 680-685. IEEE, (2021)Model-based Attack Tree Generation for Cybersecurity Risk-Assessments in Automotive., , , and . ISSE, page 1-7. IEEE, (2021)Hardware Support for Predictable Resource Sharing in Virtualized Heterogeneous Multicores., and . DSD, page 189-196. IEEE, (2022)