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Disambiguation of "Povoa, Ricardo"

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Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel.

, , , , and . DATE, page 660-665. IEEE, (2018)

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Ricardo Seminario

Ricardo Riegel

Ricardo Sichel

Ricardo Osorio

Ricardo Bernhardt

 

Other publications of authors with the same name

Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners., , , , and . VLSI-SoC, page 19-22. IEEE, (2013)A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis., , , , and . IEEE Congress on Evolutionary Computation, page 2781-2788. IEEE, (2013)Second-order compensation BGR with low TC and high performance for space applications., , , and . Integr., (2018)Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (3): 266-270 (2018)Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel., , , , and . DATE, page 660-665. IEEE, (2018)A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers., , , , , and . SMACD, page 161-164. IEEE, (2019)Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing., , , , , , , and . SMACD, page 13-16. IEEE, (2019)Artificial Neural Networks as an Alternative for Automatic Analog IC Placement., , , , , and . SMACD, page 1-4. IEEE, (2019)FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (1): 1-13 (2020)Systematic design of a voltage controlled oscillator using a layout-aware approach., , , , , , , , and . SMACD, page 1-4. IEEE, (2017)