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Disambiguation of "Álvarez, Jesús Arias"

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Nonlinearity correction for multibit ΔΣ DACs.

, , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (6): 1033-1041 (2005)

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Jesús Miguel Carnicer Álvarez

Julián Jesús Fernández Arias

Pedro Miguel d' Jesús Montilva

Rodrigo Álvarez

Jesús Araiza

 

Other publications of authors with the same name

A PLL-based synthesizer for tunable digital clock generation in a continuous-time SigmaDelta A/D converter., , , , , and . Integr., 42 (1): 24-33 (2009)Design of a switched opamp-based bandpass filter in a 0.35 μm CMOS technology., , , , , , and . ICECS, page 29-32. IEEE, (2002)Detailed analysis of the effect of a hysteretic quantizer in a multibit, Sigma-Delta modulator., , , , , and . Microelectron. J., 42 (1): 148-157 (2011)Parallel Continuous-Time DeltaSigma ADC for OFDM UWB Receivers., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (7): 1478-1487 (2009)Design of a CMOS fully differential switched-opamp for SC circuits at very low power supply voltages., , , , , , and . ICECS, page 1545-1548. IEEE, (2001)Nonlinearity correction for multibit ΔΣ DACs., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (6): 1033-1041 (2005)Stable high-order delta-sigma digital-to-analog converters., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (1): 200-205 (2004)Stable high-order delta-sigma DACS., , and . ISCAS (1), page 985-988. IEEE, (2003)A 32-mW 320-MHz continuous-time complex delta-sigma ADC for multi-mode wireless-LAN receivers., , , , , , , , and . IEEE J. Solid State Circuits, 41 (2): 339-351 (2006)Effect of Finite amplifier Bandwidth and excess Loop Delay in a Parallel CT δς ADC for OFDM UWB receivers., , , , , and . J. Circuits Syst. Comput., (2013)