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All digitally controlled linear voltage regulator with PMOS strength self-calibration for ripple reduction., , , , , , и . VLSI-DAT, стр. 1-4. IEEE, (2015)Low quiescent current variable output digital controlled voltage regulator., и . ISCAS, стр. 609-612. IEEE, (2010)A noise-tolerant matchline scheme with XOR-based conditional keeper for energy-efficient TCAM., , и . ISCAS, IEEE, (2006)An all-digital power management unit with 90% power efficiency and ns-order voltage transition time for DVS operation in low power sensing SoC applications., , , , , и . ISCAS, стр. 1370-1373. IEEE, (2015)Area-power-efficient 11-bit hybrid dual-Vdd ADC with self-calibration for neural sensing application., , , , и . SoCC, стр. 18-23. IEEE, (2016)Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory., , и . APCCAS, стр. 1301-1304. IEEE, (2006)A comparison of dual-rail pass transistor logic families in 1.5V, 0.18µm CMOS technology for low power applications., и . ACM Great Lakes Symposium on VLSI, стр. 101-106. ACM, (2000)An Energy-Efficient Accelerator with Relative- Indexing Memory for Sparse Compressed Convolutional Neural Network., , , и . AICAS, стр. 42-45. IEEE, (2019)All Digital Linear Voltage Regulator for Super- to Near-Threshold Operation., и . IEEE Trans. Very Large Scale Integr. Syst., 20 (6): 989-1001 (2012)A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control., , , , , , , , , и 9 other автор(ы). SoCC, стр. 197-200. IEEE, (2011)