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4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control.

, , , , , , , , , , , and . ISSCC, page 56-58. IEEE, (2021)

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IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems., , , , and . Hot Chips Symposium, page 1-33. IEEE, (2009)A multi DSP board for real time SAR processing using the HiPAR-DSP 16., , , , , and . IGARSS, page 2750-2752. IEEE, (2002)Efficient data transfer operations for a SIMD processor array system., , , , , , and . ICASSP, page 1625-1628. IEEE, (2012)A 12-nm Autonomous Driving Processor With 60.4 TOPS, 13.8 TOPS/W CNN Executed by Task-Separated ASIL D Control., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 57 (1): 115-126 (2022)A compact and flexible multi-DSP system for real-time SAR applications., , , , , , and . IGARSS, page 1657-1659. IEEE, (2003)A low-cost mixed-mode parallel processor architecture for embedded systems., , , , and . ICS, page 253-262. ACM, (2007)Software MPEG-2 video decoder on a 200-MHz, low-power multimedia microprocessor., , and . ICASSP, page 3141-3144. IEEE, (1998)A 1.3-GOPS parallel DSP for high-performance image-processing applications., , , , , and . IEEE J. Solid State Circuits, 35 (7): 946-952 (2000)4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control., , , , , , , , , and 2 other author(s). ISSCC, page 56-58. IEEE, (2021)