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Are FPGAs suffering from the innovator's dilemna?, and . FPGA, page 135-136. ACM, (2013)Automatic Application-Specific Calibration to Enable Dynamic Voltage Scaling in FPGAs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3095-3108 (2018)Slack Allocation and Routing to Improve FPGA Timing While Repairing Short-Path Violations., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (4): 686-697 (2008)You Cannot Improve What You Do not Measure: FPGA vs. ASIC Efficiency Gaps for Convolutional Neural Network Inference., , and . ACM Trans. Reconfigurable Technol. Syst., 11 (3): 20:1-20:23 (2018)Wotan: Evaluating FPGA Architecture Routability without Benchmarks., and . ACM Trans. Reconfigurable Technol. Syst., 11 (2): 11:1-11:23 (2018)Toward Software-like Debugging for FPGAs via Checkpointing and Transaction-based Co-Simulation., and . ACM Trans. Reconfigurable Technol. Syst., 16 (2): 31:1-31:24 (June 2023)Enhancing FPGAs with Magnetic Tunnel Junction-Based Block RAMs., , and . ACM Trans. Reconfigurable Technol. Syst., 11 (1): 6:1-6:22 (2018)Timing-driven placement for FPGAs., , and . FPGA, page 203-213. ACM, (2000)Automatic generation of FPGA routing architectures from high-level descriptions., and . FPGA, page 175-184. ACM, (2000)RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (8): 2532-2545 (2022)