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Embedded Tutorial ET2: Volume Diagnosis for Yield Improvement.

, and . VLSID, page 21-23. IEEE Computer Society, (2015)

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Techniques to Construct (2, 1) Separating Systems from Linear Error-Correcting Codes., and . IEEE Trans. Computers, 25 (9): 945-949 (1976)On the Design of Testable Domino PLAs., and . ITC, page 567-573. IEEE Computer Society, (1985)On diagnosis of pattern-dependent delay faults., and . DAC, page 59-62. ACM, (2000)Cost-Effective Generation of Minimal Test Sets for Stuck-at Faults in Combinational Logic Circuits., , , and . DAC, page 102-106. ACM Press, (1993)Fault Simulation under the Multiple Observation Time Approach using Backward Implications., and . DAC, page 608-613. ACM Press, (1997)Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Test Subsequences., and . DAC, page 754-759. ACM Press, (1999)Proptest: A Property Based Test Pattern Generator for Sequential Circuits Using Test Compaction., , and . DAC, page 653-659. ACM Press, (1999)On Efficient Concurrent Fault Simulation for Synchronous Sequential Circuits., and . DAC, page 327-331. IEEE Computer Society Press, (1992)On Achieving a Complete Fault Coverage for Sequential Machines Using the Transition Fault Model., and . DAC, page 341-346. ACM, (1991)A Class of Graphs for Fault-Tolerant Processor Interconnections., and . ICDCS, page 448-460. IEEE Computer Society, (1984)