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b VCSEL-based optical links in 90nm CMOS.

J. Proesel, C. Schow, and A. Rylyakov. ISSCC, page 418-420. IEEE, (2012)

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V Saile

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40-Gb/s circuits built from a 120-GHz fT SiGe technology.G. Freeman, M. Meghelli, Y. Kwark, S. Zier, A. Rylyakov, M. Sorna, T. Tanji, O. Schreiber, K. Walter, J. Rieh and 3 other author(s). IEEE J. Solid State Circuits, 37 (9): 1106-1114 (2002)Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications.A. Rylyakov, J. Tierno, H. Ainspan, J. Plouchart, J. Bulzacchelli, Z. Deniz, and D. Friedman. ISSCC, page 94-95. IEEE, (2009)An Adaptively Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 Gigahertz.M. Singh, J. Tierno, A. Rylyakov, S. Rylov, and S. Nowick. IEEE Trans. Very Large Scale Integr. Syst., 18 (7): 1043-1056 (2010)Ultra-Low-Power 10 to 285 Gb/s CMOS-Driven VCSEL-Based Optical Links Invited.J. Proesel, B. Lee, A. Rylyakov, C. Baks, and C. Schow. JOCN, 4 (11): B114-B123 (2012)High speed circuits for short reach optical communications.A. Rylyakov. OFC, page 1-34. IEEE, (2015)A 56.1Gb/s NRZ modulated 850nm VCSEL-based optical link.D. Kuchta, C. Schow, A. Rylyakov, J. Proesel, F. Doany, C. Baks, B. Hamel-Bissell, C. Kocot, L. Graham, R. Johnson and 4 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)Monolithically integrated silicon nanophotonics receiver in 90nm CMOS technology node.S. Assefa, H. Pan, S. Shank, W. Green, A. Rylyakov, C. Schow, M. Khater, S. Kamlapurkar, E. Kiewra, C. Reinholm and 4 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)Deeply-scaled CMOS-integrated nanophotonic devices for next generation supercomputers.S. Assefa, W. Green, A. Rylyakov, C. Schow, F. Horst, and Y. Vlasov. ACM Great Lakes Symposium on VLSI, page 475-476. ACM, (2011)34-GBd Linear Transimpedance Amplifier for 200-Gb/s DP-16-QAM Optical Coherent Receivers.M. Ahmed, T. Huynh, C. Williams, Y. Wang, P. Hanumolu, and A. Rylyakov. IEEE J. Solid State Circuits, 54 (3): 834-844 (2019)A Wide Power Supply Range, Wide Tuning Range, All Static CMOS All Digital PLL in 65 nm SOI.J. Tierno, A. Rylyakov, and D. Friedman. IEEE J. Solid State Circuits, 43 (1): 42-51 (2008)

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Disambiguation of "Rylyakov, Alexander V."

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25Gb/s 3.6pJ/b and 15Gb/s 1.37pJ/b VCSEL-based optical links in 90nm CMOS.

Please choose a person to relate this publication to

V Saile

V Geoffroy

V Ustinov

V Adams

V Fendrich

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Rylyakov, Alexander V."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 25Gb/s 3.6pJ/b and 15Gb/s 1.37pJ/b VCSEL-based optical links in 90nm CMOS.

Please choose a person to relate this publication to

V Saile

V Geoffroy

V Ustinov

V Adams

V Fendrich

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

25Gb/s 3.6pJ/b and 15Gb/s 1.37pJ/b VCSEL-based optical links in 90nm CMOS.