( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process-voltage-temperature variations.

, , и . Microelectron. J., (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Mridula Dwivedi

Ravi Chandra Dwivedi

 

Другие публикации лиц с тем же именем

Single-ended sub-threshold finfet 7T SRAM cell without boosted supply., , и . ICICDT, стр. 1-4. IEEE, (2014)Voltage up level shifter with improved performance and reduced power., , и . CCECE, стр. 1-4. IEEE, (2012)Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET., , , , и . ACM Great Lakes Symposium on VLSI, стр. 95-98. ACM, (2015)A 2.5 GHz, 1-Kb SRAM with Auxiliary Circuit Assisted Sense Amplifier in 65-nm CMOS Process., , , , и . VLSID, стр. 1-6. IEEE, (2023)A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process-voltage-temperature variations., , и . Microelectron. J., (2016)Design of Approximate Dividers for Error Tolerant Applications., , , и . MWSCAS, стр. 496-499. IEEE, (2018)A robust 8T FinFET SRAM cell with improved stability for low voltage applications., , , и . VDAT, стр. 1-6. IEEE, (2016)Nanoscale Memory Design for Efficient Computation: Trends, Challenges and Opportunity., , , , и . iNIS, стр. 29-34. IEEE, (2015)Design of Approximate Booth Squarer for Error-Tolerant Computing., , , и . IEEE Trans. Very Large Scale Integr. Syst., 28 (5): 1230-1241 (2020)ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications., , , , , , , , , и . APCCAS, стр. 100-104. IEEE, (2023)