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Disambiguation of "Choi, Kyu-Myung"

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Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution.

, , , , , and . DATE, page 242-247. ACM, (2008)

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Kyu-Myung Chung

Myung-Gu Choi

Myung-Won Choi

Sang-kyu Choi

Bong-Kyu Choi

 

Other publications of authors with the same name

An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication., , , , , and . DATE, page 1244-1249. ACM, (2008)DTOC: integrating Deep-learning driven Timing Optimization into the state-of-the-art Commercial EDA tool., , , , and . DATE, page 1-6. IEEE, (2023)SRAM On-Chip Monitoring Methodology for Energy Efficient Memory Operation at Near Threshold Voltage., , , and . ISVLSI, page 146-151. IEEE, (2019)SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage., , , , and . Integr., (2020)Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture., , , , , , , and . DATE, page 138-139. IEEE Computer Society, (2005)Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution., , , , , and . DATE, page 242-247. ACM, (2008)Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion., , , and . ASP-DAC, page 500-506. IEEE, (2018)Power gating: Circuits, design methodologies, and best practice for standard-cell VLSI designs., , , and . ACM Trans. Design Autom. Electr. Syst., 15 (4): 28:1-28:37 (2010)A practical approach of memory access parallelization to exploit multiple off-chip DDR memories., , , , , and . DAC, page 447-452. ACM, (2008)Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (8): 1933-1946 (2019)