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Effective SAT-based Solutions for Generating Functional Sequences Maximizing the Sustained Switching Activity in a Pipelined Processor., , , , , and . ATS, page 73-78. IEEE, (2021)Automating the Generation of Functional Stress Inducing Stimuli for Burn-In Testing., , , , , and . ETS, page 1-5. IEEE, (2023)Towards SAT-Based SBST Generation for RISC-V Cores., , , and . LATS, page 1-2. IEEE, (2021)Automating the Generation of Programs Maximizing the Repeatable Constant Switching Activity in Microprocessor Units via MaxSAT., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (11): 4270-4281 (November 2023)Using Formal Methods to Support the Development of STLs for GPUs., , , , , and . ATS, page 84-89. IEEE, (2022)Automatic Identification of Functionally Untestable Cell-Aware Faults in Microprocessors., , , , , and . ATS, page 1-6. IEEE, (2023)Constraint-Based Automatic SBST Generation for RISC-V Processor Families., , , , and . ETS, page 1-6. IEEE, (2023)A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors., , , , , , , , , and 10 other author(s). ETS, page 1-10. IEEE, (2023)