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The MD5 Message-Digest Algorithm in the XILINX FPGA., , and . FPL, volume 849 of Lecture Notes in Computer Science, page 126-128. Springer, (1994)Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems., and . DDECS, page 144-145. IEEE Computer Society, (2008)Redundancy algorithm for embedded memories with block-based architecture., and . DDECS, page 271-274. IEEE Computer Society, (2013)Delay Fault Coverage Increasing in Digital Circuits., and . DSD, page 475-478. IEEE Computer Society, (2013)Integrated Design and Test Generation Under Internet Based Environment MOSCITO., , , , , , , and . DSD, page 187-195. IEEE Computer Society, (2002)REGGEN-Test pattern generation on register transfer level., , , and . EURO-DAC, page 259-264. IEEE Computer Society, (1993)Hierarchical defect-oriented fault simulation for digital circuits., , , , , , , and . ETW, page 69-74. IEEE Computer Society, (2000)A novel automatic test pattern generator for asynchronous sequential digital circuits., and . Microelectron. J., 42 (3): 501-508 (2011)Internet-Based Collaborative Test Generation with MOSCITO., , , , , , , and . DATE, page 221-226. IEEE Computer Society, (2002)Diagnosis of faulty units in regular graphs under the PMC model., and . DDECS, page 202-205. IEEE Computer Society, (2009)