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Disambiguation of "Theodoridis, George"

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FPGA implementation of a MIMO DFE IN 40 GB/S DQPSK optical links.

, , , , , , and . EUSIPCO, page 1581-1585. IEEE, (2015)

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Alexandros Theodoridis

Karolina Theodoridis

Ulrike Theodoridis

Theodoros Theodoridis

Christos Theodoridis

 

Other publications of authors with the same name

A novel approach for reducing the switching activity in two-level logic circuits., , , , and . ICECS, page 840-843. IEEE, (1996)Static Mapping of Applications on Heterogeneous Multi-Core Platforms Combining Logic-Based Benders Decomposition with Integer Linear Programming., , , and . ACM Trans. Design Autom. Electr. Syst., 23 (2): 26:1-26:24 (2018)A Logic-Based Benders Decomposition Approach for Mapping Applications on Heterogeneous Multicore Platforms., , , and . ACM Trans. Embed. Comput. Syst., 15 (1): 19:1-19:28 (2016)Implementing VESA Display Stream Compression Encoder in FPGAs., and . PATMOS, page 35-40. IEEE, (2019)A Novel Data-Path for Accelerating DSP Kernels., , , , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 363-372. Springer, (2004)Low-memory and high-performance architectures for the CCSDS 122.0-B-1 compression standard., and . Integr., (2019)Exploring the FPGA Implementations of the LBlock, Piccolo, Twine, and Klein Ciphers., , , and . VLSI-SOC, page 46-51. IEEE, (2020)A Multi-stage Hybrid Approach for Mapping Applications on Heterogeneous Multi-core Platforms., , , and . VLSI-SoC, page 1-6. IEEE, (2022)Accurate Power Estimation of Logic Structures Based on Timed Boolean Functions., , , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 76-87. Springer, (2000)A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive Kernels., , , and . Journal of Circuits, Systems, and Computers, 14 (4): 877-893 (2005)